1. Field of the Invention
The present invention relates to a server for supporting large scale integration (LSI) manufacturing, a method for supporting LSI manufacturing, and a computer program product executed on a server for supporting LSI manufacturing, in order to perform development schedule management.
2. Description of the Related Art
Demands have been made for increased design efficiency in the design of system LSI where multiple function blocks of an electronic circuit are integrated upon a piece of silicon chip, including abstraction for logic design description, improvement of Electronics Design Automation (EDA) techniques for design automation, and introduction of computers with higher processing performance. However, in actuality, the fact is that improvements in design efficiency obtained through the development of these techniques cannot keep up with the tremendous increases in integration. Meanwhile, there are increased market demands for a shortened design time period because of contraction in the life of system products in recent years. Accordingly, there are hopes for techniques that attempt to fill in the gap between the increased large scale of LSI and design efficiency through reutilization of previously designed LSI function blocks as design data or “intellectual property (IP)”, thereby shortening the LSI design time period and improving productivity. Generally, the design and manufacture of systems on a chip requires hierarchical or portioned approaches to provide reuse. This reuse is often described as the IPs that can be shared and reused. Several forms of IP are available today, such as soft (e.g. hardware description language), firm (e.g. hardware description language with placement information), and hard (e.g. mask layout data).
Methods using this sort of reusable function blocks (or IPs) as components are extremely important for performing highly complex system development within a realistic time period and resources. Accordingly, when manufacturing system LSI, demands are being made for improvement to the LSI design method using reusable electronic circuit function blocks as LSI components and rapid development of IP required for LSI design.
Conventionally, in situations where LSI development and IP development take place simultaneously in parallel, the status of the progression of each development group (or project) has been managed by circulating a spreadsheet, having the respective groups fill in the appropriate items, and holding periodic meetings. In addition, conventionally, IP design data referenced during LSI development has been managed using commercial IP management tools with which users are given unlimited download access to registered IP design data.
The typical life cycle of system LSI is short and there is competition to see who can develop faster under the present situation. However, in conventional situations where, for example, spread sheet is circulated, and each development group successively fills in the status of their respective progression, circulation can require weeks or even a month to complete, leading to problems such as not being able to respond in a timely manner to schedule changes, or the like. Furthermore, since the currently circulated spreadsheet does not always show current conditions in real-time, the fact that proper decisions cannot be made is also a problem.
Moreover, when IP design data is managed using commercial IP management tools, there is a problem with the scheme allowing unlimited downloads without confirmation of technical or business constraints for reusing IP.